BAE Systems Senior ASIC/FPGA Design & Verification Engineer in Cedar Rapids, Iowa
BAE Systems is looking for a Senior ASIC/FPGA Design and/or Verification Engineer with a passion for engineering and the desire to be part of an innovative, dedicated team responsible for industry-leading Global Positioning Systems (GPS) products. Our team needs engineers interested in architecting, designing, and verifying FPGA and ASIC designs. This position offers abundant opportunity to work closely with other FPGA/ASIC design and verification engineers in a team effort focusing primarily on military airborne and weapons GPS receivers.
As a part of this team, you will have responsibilities spanning all phases of the FPGA/ASIC engineering life cycle, including requirements analysis, design and code development, verification, integration, and
Must have very good communication skills, verbal and written. As a Senior level engineer you will be expected to work independently with minimal supervision while providing feedback on milestones and project execution.
Job Responsibilities May Include:
Formal Requirements Capture
Design Extraction (from Requirements)
Detailed Design (HDL)
Design Module Integration
Hardware Integration (Lab environment)
Create Module Level Verification using HDL simulations
Execute Verification Simulations
Analyze Verification Results
Required Education, Experience, & Skills
A Bachelor's degree in a Science, Technology, and Engineering or Math (STEM) discipline or 6 years relevant experience required.
Experience with VHDL and/or Verilog.
Development Tools (QuestaSim, Intel Prime/Quartus, Xilinx Vivado, Synopsys Tools Suite, Cadence Tools Suite, etc.)
Familiar with Digital Signal Processing
Data Transfer Standards (USB, PCIe, Ethernet, etc)
Scripting using TCL, Perl, Unix
Preferred Education, Experience, & Skills
Hardware Lab Testing/Integration
FPGA Development Board Usage
ASIC/FPGA Power Estimation
Design for Test (DFT)
Model Based Design (HDL Coder, DSPBuilder, etc.)
Experience with Configuration Management Tools (Subversion, Git, Clearcase, etc.)
Senior ASIC/FPGA Design & Verification Engineer
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